A digital signal processor (DSP) is a special purpose processor designed for high speed data acquisition and manipulations such as multiplies, adds and subtracts. These high speed functions are required to perform the mathematically intensive and real time operations required to digitize and process speech, music, video, telephone and electromechanical signals. Some common applications for digital signal processing include the telephone modem and PC multimedia.
In a typical computer system including digital signal processing, digital signal processors are dedicated slaves that perform signal processing tasks. Most systems create specialized areas of memory or dedicate input devices whose access is restricted and under very tight control of the system central processor units (CPUs). An example of such a system is illustrated in FIG. 1.
FIG. 1 provides a simple block diagram of a symmetric multiprocessing (SMP) computer system employing currently available commodity components. The design shown employs Intel Pentium Pro.TM. processors and a high-performance bus and chipset, such as an Intel P6 bus and 8245GX chipset. The system as shown in FIG. 1 includes up to four CPUs 101 connected to a high-bandwidth split-transaction bus 103. A system memory 105 is connected to bus 103 through a memory controller 107. Connection to one or more DSPs 112 or other standard PCI devices is provided through PCI I/O interfaces 109. As stated above, all of these components are currently available commodity components.
The present invention relates to a computer system wherein the digital signal processors and conventional central processing units (CPUs) have equal and uniform access to all system resources.
Integrated data processing/DSP systems including a shared internal bus for transferring both instructions and data are known in the art as evidenced by the U.S. Pat. No. 5,511,219 to Shimony et al. As disclosed therein, a general purpose CPU is connected to the shared bus for retrieving instructions, and a DSP module is connected with the bus for processing an externally provided digital signal by executing DSP command list instructions. The execution of command list instructions by the DSP is independent of the execution of general purpose instructions by the CPU. However, the mapping of DSP memory and execution of CPU and DSP instructions is controlled by the CPU.
Also known in the art is a digital signal processor subsystem that is connected to a plurality of application specific hardware devices as described in the Baker et al U.S. Pat. No. 5,291,614. A single DSP concurrently handles a plurality of different signal processing functions on a real-time basis. While the prior devices operate satisfactorily, they do not provide the versatility available with a plurality of DSPs and CPUs which have equal and uniform access to all system resources. The present invention was developed to accommodate these needs.